01188na  a2200289   4500001001300000005001500013008004100028024002700069035001800096035002700114035002700141100003700168370004800205372005300253372002000306373005100326374004800377375001100425377002200436400003000458400003100488400003000519670010700549670011700656670005400773670007100827KAC20170234720211130104517170117 b aznnnaabn          fa aaa      7 a00000004599825632isni  a(KRI)10104337  a(KISTI)ADPER0000294241  a(KISTI)ADPER68014244031 a위재경,g魏在慶d1966-2015  c한국(국명)[韓國]0KSH20000101452nlsh  a전자 공학[電子工學]0KSH19980184202nlsh  a반도체소자  a숭실대학교 전자정보공학부 (교수)  a교수(대학)[敎授]0KSH19980114932nlsh  a남성  l한국어l영어1 aWi, Jaekyeong,d1966-20151 aWee, Jae-Kyung,d1966-20151 aWee, Jaekyung,d1966-2015  aModeling and characterization of multi-layered interconnects in VLSI circuits, (서울大學校), 1998  aPower line noise reduced low power consumption circuit design methodology for SoC, (대한전자공학회), 2004  a한국연구자정보(KRI)uhttps://www.kri.go.kr  a한국과학기술정보연구원(KISTI)uhttps://www.kisti.re.kr/