00867na  a2200217   4500001001300000005001500013008004100028024002700069035002700096100001400123370004800137372005300185372004800238373006500286374005700351377002200408400002100430400002000451670010700471670007100578KAC2018K033420220926125529181011 b aznnnaabn          fa aaa      7 a00000004738508582isni  a(KISTI)ADPER68018049811 a장형욱  c한국(국명)[韓國]0KSH20000101452nlsh  a전자 공학[電子工學]0KSH19980184202nlsh  a공학(과학)[工學]0KSH20000036682nlsh  a한국전자통신연구원a인하대학교 전자공학과  a연구원(연구자)[硏究員]0KSH19980377142nlsh  l한국어l영어1 aJang, Hyung-wook1 aJang, Hyungwook  a(A) 1.25Gb/s clock recovery circuit using half-rate 4X-oversampling PFD, (대한전자공학회), 2004  a한국과학기술정보연구원(KISTI)uhttps://www.kisti.re.kr/